I have asked this question before, but I think this time I can ask with some more clarity.
The below is my RTC Test code. I am using msp430f5418 with IAR EW 5.
My problem is after some time (we tested with 15 minutes and more) the minutes interrupt is coming earlier than expected.
ie, On first time, after exactly 60 seconds and after 15 minutes the minute interrupt comes on 45th seconds itself.
Why is it so? We are using the library provided by TI for RTC register manipulation.
Can anybody tell me why is it so??
Is it the problem with the code or with the improper usage of library or with the hardware itself??
Thanks in advance...
#include <msp430.h>
#define RTC_VALID_READ_MAX_WAIT 500U
int main()
{
WDTCTL = WDTPW + WDTHOLD;
RTCCTL01 = RTCMODE + RTCTEVIE + RTCTEV_0;
RTCCTL01 |= RTCHOLD;
/* Calling the routines in the workaround assembly module supplied by TI */
SetRTCYEAR (2011U);
SetRTCMON (6U);
SetRTCDOW (3U);
SetRTCDAY (4U);
SetRTCHOUR (23U);
SetRTCMIN (0U);
SetRTCSEC (0U);
RTCCTL01 &= ~RTCHOLD;
__enable_interrupt();
while(1)
{
}
}
#pragma vector=RTC_VECTOR
__interrupt void handle_rtc_interrupt(void)
{
switch(RTCIV)
{
case 2U: /* RTC one second Ready Event for valid read */
{
int wait_counter = 0U;
while (!(RTCCTL01&RTCRDY)) /* Wait for RTCRDY to go high, so read will be valid. */
{
wait_counter++;
if (wait_counter > RTC_VALID_READ_MAX_WAIT)
{
break;
}
}
if (wait_counter<=RTC_VALID_READ_MAX_WAIT)
{
volatile int min = RTCMIN;
volatile int sec = RTCSEC;
}
RTCCTL01 |= RTCHOLD;
RTCCTL01 &= ~RTCRDYIE;
RTCCTL01 &= ~RTCHOLD;
break;
}
case 4U: /* RTC Minute Interval Event */
{
RTCCTL01 |= RTCHOLD;
RTCCTL01 |= RTCRDYIE; /* Enable Ready Flag Interrupt */
RTCCTL01 &= ~RTCHOLD;
break;
}
default:
{
break;
}
}
}
Hari
Plot the interval between interrupts over time. Let cool, restart, but run a hair drier at it and repeat the plot. If it changes you are getting a temperature effect on your oscillator.
I am afraid that I cannot help you with debugging the code but I gave up on the RTC in the 5418 as I was having continuous failures in the hardware. This was back in 2008 when I had prototype and first production silicon. I do not think that the RTC bugs have been fully worked out even now in the standard (non A) grade parts. As I have to run on any 5418 production silicon (any mask rev/errata level) and was migrating from the F2418 and F149 processor,s I already had a soft RTC and just went back to that. The overhead in processing and power consumption was minimal.