Why are conditionally executed instructions not pr

Question

Naively, conditionally executed instructions seem like a great idea to me.

As I read more about ARM (and ARM-like) instruction sets (Thumb2, Unicore, AArch64) I find that they all lack the bits for conditional execution.

Why is conditional execution missing from each of these?

Was conditional execution a mistake at the time, or have subsequent changes made it an expensive waste of instruction bits?

Answer 1

"Why are conditionally executed instructions not present ..." "Was conditional execution a mistake at the time, or have subsequent changes made it an expensive waste of instruction bits?"

[Biased Reply, Author associated with the idea (and a proponent of it)]

Design choice. Add features and you expand your possibilities; remove them and you can implement workarounds, or do without.

Cost, TDP, and Patents, even the technical skill level necessary to develope a competing product all come into play.

There are billions on the table, when you roll those die you don't want to roll the whole Business too, so they choose not to.

In my opinion it is an error to omit elison ability in a Server Processor getting pinned to a Fabric, but I am biased.

It is not a mistake (to have it, well implemented), it is expensive, it's not a waste (the bits are smart and mind their own business).

It is like any CPU Extension, or adding a GPU; if you can make skillful use of your Tools then your good to go, otherwise pack light.

Wikipedia Quote: "According to different benchmarks, TSX can provide around 40% faster applications execution in specific workloads, and 4–5 times more database transactions per second (TPS).".

It's 'costly' (for some situations) but important for the current style of programming, or more pessimistically a means to score far higher in synthetic Benchmarks.

Someday it will be as easy as Lego, and you will be able to ask 'it' to assemble itself and do your biddingask; until then the Processor MUST support Programmer (and Compiler writers) laziness - thus the rarity of Programs that can run mostly on the GPU (but we are getting there).

Therefore, the removal of (great) features that are thought unwanted or were not implemented in a cost effective and competitive manner.

Thus, TSX rules currently; but ARM CPUs need fancy Threads for their Fabric too.

URL References:

AMD: https://en.wikipedia.org/wiki/Advanced_Synchronization_Facility

Intel: https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions

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