minimum c++ make file for linux

2019-01-31 08:47发布

I've looking to find a simple recommended "minimal" c++ makefile for linux which will use g++ to compile and link a single file and h file. Ideally the make file will not even have the physical file names in it and only have a .cpp to .o transform. What is the best way to generate such a makefile without diving into the horrors of autoconf?

The current dir contains, for example

t.cpp t.h

and I want a makefile for that to be created. I tried autoconf but its assuming .h is gcc instead of g++. Yes, while not a beginner, I am relearning from years ago best approaches to project manipulation and hence am looking for automated ways to create and maintain makefiles for small projects.

11条回答
老娘就宠你
2楼-- · 2019-01-31 09:16

Have you looked at OMake ?

OMakeroot

open build/C
DefineCommandVars()
.SUBDIRS: .

OMakefile

.DEFAULT: $(CXXProgram test, test)

Then on Linux or Windows, simply type:

omake

As a bonus, you automatically get:

  • parallel builds with the -j option (same as make).
  • MD5 checksums instead of timestamps (build becomes resilient to time synchronization failures).
  • Automatic and accurate C/C++ header dependencies.
  • Accurate inter-directory dependencies (something that recursive make does not offer).
  • Portability (1 build chain to rule them all, immune to path style issues).
  • A real programming language (better than GNU make).
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走好不送
3楼-- · 2019-01-31 09:16

florin has a good starting point. I didn't like gnu autoconf so I started there and took the concept further and called it the MagicMakefile. I have 3 versions of it from simple to more complex. The latest is now on github: https://github.com/jdkoftinoff/magicmake

Basically, it assumes you have a standard layout for the source files of your project and uses the wildcard function to create the makefile rules on the fly which are then eval'd, handling header file dependancies, cross compiling, unit tests, install, and packaging.

[edit] At this point I use cmake for all my projects since it generates useful project files for many build systems.

jeff koftinoff

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该账号已被封号
4楼-- · 2019-01-31 09:21

Here is a generic makefile from my code snippets directory:

SOURCES=$(wildcard *.cpp)
OBJECTS=$(SOURCES:.cpp=.o)
DEPS=$(SOURCES:.cpp=.d)
BINS=$(SOURCES:.cpp=)

CFLAGS+=-MMD
CXXFLAGS+=-MMD

all: $(BINS)

.PHONY: clean

clean:
    $(RM) $(OBJECTS) $(DEPS) $(BINS)

-include $(DEPS)

As long as you have one .cpp source producing one binary, you don't need anything more. I have only used it with GNU make, and the dependency generation uses gcc syntax (also supported by icc). If you are using the SUN compilers, you need to change "-MMD" to "-xMMD". Also, ensure that the tab on the start of the line after clean: does not get changed to spaces when you paste this code or make will give you a missing separator error.

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【Aperson】
5楼-- · 2019-01-31 09:24

Some good references on creating a basic Makefile

http://en.wikipedia.org/wiki/Make_(software)

http://mrbook.org/tutorials/make/

http://www.opussoftware.com/tutorial/TutMakefile.htm

http://www.hsrl.rutgers.edu/ug/make_help.html

The first couple in particular have minimal example Makefiles like you were describing. Hope that helps.

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爷的心禁止访问
6楼-- · 2019-01-31 09:31

I was hunting around for what a minimal Makefile might look like other than

some_stuff:
    @echo "Hello World"

I know I am late for this party, but I thought I would toss my hat into the ring as well. The following is my one directory project Makefile I have used for years. With a little modification it scales to use multiple directories (e.g. src, obj, bin, header, test, etc). Assumes all headers and source files are in the current directory. And, have to give the project a name which is used for the output binary name.

NAME = my_project

FILES = $(shell basename -a $$(ls *.cpp) | sed 's/\.cpp//g')
SRC = $(patsubst %, %.cpp, $(FILES))
OBJ = $(patsubst %, %.o, $(FILES))
HDR = $(patsubst %, -include %.h, $(FILES))
CXX = g++ -Wall

%.o : %.cpp
        $(CXX) $(HDR) -c -o $@ $<

build: $(OBJ)
        $(CXX) -o $(NAME) $(OBJ)

clean:
        rm -vf $(NAME) $(OBJ)
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