Automatically discovering C dependencies

Question

I'm required to write documentation for my current project that lists all .c files and for each one lists every .h file which is directly or indirectly included by that file.

This is a large project, and although we have Makefiles which theoretically have this information, those Makefiles are sometimes incorrect (we inherited this project from another company). We've often had to do a make clean ; make for our changes to actually be reflected in the recompilation, so I don't want to rely on these Makefiles.

So is there a tool which lets us give it the name of a .c file and an include path and have it tell us all of the .h files which are directly or indirectly included by the .c file? We don't have anything weird like

#define my_include "some_file.h"
#include my_include

so the tool doesn't need to be perfect. Anything that searched .c and .h files in an include path for regular includes would be good enough.

Answer 1

Use SCons

$ scons --tree=all
scons: Reading SConscript files ...

scons: done reading SConscript files.
scons: Building targets ...
scons: `.' is up to date.
+-.
  +-SConstruct
  +-app
  | +-test.o
  | | +-test.c
  | | +-/include/PCI_1149_1.h
  | | +-/include/Pci.h
  | | +-/usr/bin/gcc
  | +-/usr/bin/gcc
  | +-/lib/libpci1149_64.a
  ...

Answer 2

What I do in my Makefile is

SRCS=$(wildcard *.c)

depend: $(SRCS)
    gcc -M $(CFLAGS) $(SRCS) >depend

include depend

This means that if any of the source files are updated, the depend rule will run, and use gcc -M to update the file called depend. This is then included in the makefile to provide the dependency rules for all the source files.

Make will check that a file is up to date before including it, so this depend rule will run if necessary whenever you run make without you needing to do a "make depend".

This will run any time any file has changed. I've never found this a problem, but if you had a huge number of files in the directory you might find it took too long, in which case you could try having one dependency file per source file, like this:

SRCS=$(wildcard *.c)
DEPS=$(SRCS:.c=.dep)

%.dep : %.c
    gcc -M $(CFLAGS) $< >$@

include $(DEPS)

Note that you can use -MM instead of -M to not include system headers.

Answer 3

"gcc -M file.c" does what you need.

Answer 4

In MSVC (2005 and 2008 at least, possibly other versions as well but not VC6) you can get the compiler to tell you all the files that were included during compilation. The output is quite verbose, but complete and fairly easy to parse with human eyes.

In Project Settings, go to the C/C++>Advanced tab, and toggle "Show Includes," then rebuild your project from the ground up.

Answer 5

An alternative to gcc -M is fastdep. Fastdep's author reports fastdep to be ten times faster than gcc's -M. If the project takes a while to build, fastdep may be worth a look.