ignoring at (@) symbol in makefiles

2020-02-10 04:15发布

In makefiles, a line prefixed with an at symbols disables the print of the output. I have a makefile where every line is prefixed with an at, but for debug I need to see what's going on. Is there a way to tell make to ignore the at and output the line ? the debug is excessive, and the -n option prints them, but does not do anything (it's for dry run)

标签: makefile
6条回答
Emotional °昔
2楼-- · 2020-02-10 04:34

In GNU Make, this isn't possible out of the box. Having a Makefile which is non-configurably completely silent is simply bad practice. Removing the @ signs and running with -s is the easiest way to get a silent build (except for possible echo commands).

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够拽才男人
3楼-- · 2020-02-10 04:37

Take out all the @ and add this line to the Makefile:

.SILENT :

When you want to debug, comment out the .SILENT line.

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女痞
4楼-- · 2020-02-10 04:39

Disabling the @ in front of a make script is useful, however sometimes it is too noisy when the make script is very long. Another debugging technique is to turn on a shell feature that echoes commands just before they execute. This obviates a need to manipulate @ or .SILENT. Consider an example Makefile:

test:
    @blah; \
    : ... lots of script commands ... ; \
    : Start debugging here ; \
    set -x; \
    : ... script segment to debug ... ; \
    set +x; \
    : Stop debugging here ; \
    : ... lots of script commands ... ;

This is likely non-portable since it depends on features present in the shell that executes the script, but portability is not really that important for debugging (if it works for you).

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Lonely孤独者°
5楼-- · 2020-02-10 04:43

Make a variable that has a default value of @:

AT := @

And then use that in your Makefile:

foo:
    $(AT)fooc -o $@

Then run make as make AT=. You can get fancier than that, if you like:

V := 0
AT_0 := @
AT_1 :=
AT = $(AT_$(V))

This will make commands silent, unless V is set to 1 (e.g., make V=1). This uses the non-POSIX, but common feature of recursive variable expansion.

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\"骚年 ilove
6楼-- · 2020-02-10 04:46

To make things even more configurable, allow a make switch to enable verbosity. It default normal to silent mode. Only with the -e VERBOSE=1 mode it will be verbose of course:

##
# Verbose ENABLE/DISABLE
# invoke make -e VERBOSE=1
##
V=@
ifeq ($(VERBOSE),1)
    V=
endif   

all:
    $(V)echo test
    echo test

Thank you for this topic it was of great help for my work.

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别忘想泡老子
7楼-- · 2020-02-10 04:50

You can have make tell someone else to print the commands as they are executed, which is much the same thing:

make SHELL='/bin/sh -x' ...your make arguments...

However this won't work quite so well if your makefile contains shell script fragments as recipes, rather than sequences of separate simple commands, as you'll see the individual shell commands as they are encountered instead of the whole fragments as they are invoked.

Alternatively, you could actually take advantage of the free-software nature of GNU Make and hack up your own version that ignores the @ signs. Grepping the GNU Make source code for COMMANDS_SILENT will soon show you that it suffices to add 1 || to the ?: condition in the arguments to the message() call in start_job_command() in job.c. Job done!

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