Why did some processor manifacturers decide to use
- Little endian
- Big endian
- Middle endian
- Any others?
?
I've heard that with big endian one can find out faster, if a number is negative or positive, because that bit is the first one. (This doesn't matter on modern CPUs, as individual bit can't be accessed anymore.)
There is no particular benefit of big or little endian as such, except using native CPU endianness or handling specified file endianness.
The reason why both big and little endian coexist is that different CPU makers used different conventions for representing multibyte data, and no standard emerged at the time.
The benefit of little endianness is that a variable can be read as any length using the same address.
For example a 32 bit variable can be read as an 8 bit or 16 bit variable without changing the address. This may have limited benefit these days, but in the days of assembler and limited memory it could be a significant advantage
Using the endianness of the CPU (no matter little or big) gives you the speed benefit on arithmetics: you can add, subtract etc. multibyte integers directly in memory.
Using a predefined, prescribed endianness (no matter little or big) in a file format gives you the benefit of being able to read the file on any system, no matter the endianness of the CPU of the other system. Systems with the right endianness can read the file faster (if the read routine is written and optimized properly), but even systems with the wrong endianness can read it. Usually, the speed difference is negligable (except for very large files with lots of integers), so it is a good idea to first measure the maximum possible speed gain of optimizing the read routine.
Some file formats (for example TIFF) support both endianness. In this case it is a good idea to generate the file with the CPU's endianness, assuming the file would be post-processed on the same machine, or a similar machine.
Certain operations benefit from having parts of a value available before another part. When adding two unsigned or two's-complement numbers which are too large to read all at once, the lower bits of the result can be computed before the upper bits are available, but not vice versa, implying that little-endian order is advantageous there. When accessing a serial flash chip, row decoding can only begin when all of the bits which define the row (typically all but the least-significant 8-12 bits, depending on the chip) become available, implying that big-endian order is advantageous there.
In little endian you don't bother to change the address, but in big endian you have to: http://www.noveltheory.com/techpapers/endian.asp
I don't actually know if still little endian has advantage over big endian in modern CPUs. I -naively- think that switching the address costs the CPU picowatts of power :)