Build multiple objects from one source file

Question

I have a set of C source files that need to be built in a shared lib and in an executable, with different CFLAGS:

%.o: %.c
    $(CC) -c -o $@ $^ $(BIN_CFLAGS)

lib-%.o: %.c
    $(CC) -c -o $@ $^ $(LIB_CFLAGS)

Make says:

No rule to make target 'lib-x.o', needed by 'liby.so'. Stop.

Is there no alternative to writing the rules for lib-x.o and the other object files one by one ?