Compiling chisel source files in chisel project te

问题:

I'm new to chisel. Currently I'm following chisel-tutorial wiki using chisel3. After cloning the chisel project template linked there, I tried to test and generate verilog output from GCD.scala source file. I got the following error.

> run --v
java.lang.RuntimeException: No main class detected.
    at scala.sys.package$.error(package.scala:27)
[trace] Stack trace suppressed: run last compile:run for the full output.
[error] (compile:run) No main class detected.
[error] Total time: 0 s, completed Dec 1, 2016 12:28:46 AM

So following a solution I found on a mailing list (to this same problem) I inserted the following code block at the end of GCD.scala file

object GCDMain {
def main(args: Array[String]): Unit = {
    chiselMainTest(Array[String]("--backend", "c", "--genHarness"),
        () => Module(new GCD())){c => new GCDTests(c)}
}
}

But I still get the same error. (I added the GCDTests class too)

回答1:

In moving from Chisel 2 to Chisel 3, the developers of Chisel made the decision to promote ScalaTest-style testing of Chisel designs. The chisel-template repo provides a test that can be run with the command sbt test (for more information on testing with sbt, see http://www.scala-sbt.org/0.13/docs/Testing.html). Running this command will generate Verilog and run some execution-driven tests to show that the example code works.

The GCDMain you found in the mailing list would have worked in Chisel 2 but will not work for Chisel 3. If you just want to Verilog and not run any tests, please see Is there a simple example of how to generate verilog from Chisel3 module?.