Let we have a simple make-file:
default:
$(CC) $(FLAGS) $(TARGET) $(TARGET).c
CC=gcc
FLAG= -o
TARGET=binary
So does variables CC, FLAG and TARGET will be added to environment variables array of make tool or this variables doesn't depend of make's variable environment?
I'm not sure what exactly you're asking here, but: make maintains its own set of variables which are entirely separate from "environment variables" (in the standard system definition of environment variables). When make expands a variable (such as $(CC)), it uses the value in its set of "make variables", not "environment variables".
When make starts up, it imports all its environment variables as "make variables" so they can be accessed via normal make variable expansion.
If you change the value of a make variable which is also part of the environment, then the value in the environment is also changed. Also when you use the export keyword (in GNU make) then make will put that variable in the environment as well.
When make runs a program it passes the environment variables, but not the make variables, to the program it's running.
