Late variable expansion in gnu Makefile

问题:

I split a big file using the split command in a Makefile recipe.

trails : $(OBJ)
    sort -m $? | accumulate.py --threshold 30 | split -C 10MB -d -a 3 - trail.

I then rename the resulting files to have the .acc extension. The idea is to have an implicit rule applied on this extension later.

The issue I face is that variable expansion happens before the .acc files are generated. For example the following rule doesn't produce anything:

all: $(wildcard *.acc) trails
    @echo $?

Using the patsubst function doesn't work either because I don't know in advance how many output files split will generate.

PS. I split the files to take advantage of the ability of make to parallel the jobs: make -j 16 for example.

回答1:

You'll have to use recursive make. Perform the split operation in this makefile, then invoke a recursive make to handle the rest. Your question was not completely clear, but I think you want something like this:

all: trials
         $(MAKE) recurse

trials: $(OBJ)
         sort -m ...

recurse: $(wildcard *.acc)
         echo $?