I have two makefiles, directoryA/Makefile
and directoryB/Makefile
.
directoryA/Makefile
depends on targets in a rather large and complex directoryB/Makefile
.
I could do a recursive make
$(MAKE) -C directoryB
But that is undesirable for several reasons. Two big reasons: I make have to execute the makefile several times, and make
can't correctly know when rebuilding a target is necessary.
I would like to use the include
directive. The problem is twofold:
The targets in
directoryB/Makefile
are all defined relative to that Makefile.Many commands depend on the working directory being
directoryB
.
Recursive make solves both of these problems, but with big disadvantages (mentioned earlier). Is there a way to solve both problems when using include
?