Is it possible to set ISR Handler at runtime on M0

问题:

I have a "default" resetVectors.c file for my SAMD21 ARM M0+. It has something that looks like:

__attribute__ ((section(".vectors")))
const DeviceVectors exception_table = {
    ...
};

in it that defines where different handler stubs. For testing purposes, I want to use one of the unused peripheral IRQs.

By default, the unused ones are set to NULL addresses. I have demonstrated to myself that I can modify that file and at compile time change my unused IRQ (21) to fire a handler. BUT, is it possible to do this outside of compile time?

I observed that the table appears to be based at offset 0. So I tried this:

DeviceVectors *table = 0x0000000;
table->pvReserved21 = PV21Handler;

But that just hangs the board. Is there a dynamic way to assign the handler at runtime?

回答1:

In Cortex-M it is possible to set the address of the vector table at runtime. So in order to set a specific vector, you need to locate the vector table into RAM.

The simplest method in this case is to copy the vector table pointed to by exception_table to RAM, modify the specific vector you need to change in the RAM copy, then switch the vector table to the RAM copy.

Note however that the Vector Table Offset Register is optional on Cortex-M0+ and may not be implemented on all devices. It is however implemented on SAMD21 (see 7.1.1 of the datasheet summary.

回答2:

You can place the vector table in in the RAM or if you do not want it there you can copy it to the new location in the FLASH memory changing the ISR vector. Then you can change the address of the of the vector table itself.