I'm interested in tinkering directly with the contents of the BTB (branch target buffer) and GHB on the Cortex A8. The ARM manual says stuff like:
To write one entry in the instruction side GHB array, for example:
LDR R0, =0x3333AAAA;
MCR p15, 0, R0, c15, c1, 0; Move R0 to I-L1 Data 0 Register
LDR R1, =0x0000020C;
MCR p15, 0, R1, c15, c5, 2; Write I-L1 Data 0 Register to GHB
To read one entry in the instruction side GHB array, for example:
LDR R1, =0x0000020C;
MCR p15, 0, R1, c15, c7, 2; Read GHB into I-L1 Data 0 Register
MRC p15, 0, R0, c15, c1, 0; Move I-L1 Data 0 Register to R0
I'm just interested in the format of the data. Presumably the contents of the GHB are 2 bits, right? So the point is to come up with some index for a particular of the 4096 values, load that index into a register, then read the value you're looking for into a register (in the example, r0).
But I'm unclear as to what that format is. I've read from other sources that:
The GHB is indexed by 10-bit history of the direction of the last ten branches encountered and 4 bits of the PC.
Can anybody help explain this a little more and/or provide a valid format for the actual indexes to use to read/write? I'm going to try this on the actual hardware soon, and presumably I should only get a 00, 01, 10 or 11 from the I-L1 Data 0 register, regardless of which index I load into r1 (as in the example above), but any more explanation is appreciated.
(If you want go give the same information for how to index the BTB, that would be great too! The instructions for that are below)
To write one entry in the instruction side BTB array, for example:
LDR R0, =0x01234567;
MCR p15, 0, R0, c15, c1, 0; Move R0 to I-L1 Data 0 Register
LDR R2, =0x0DDFFFFF;
MCR p15, 0, R2, c15, c1, 1; Move R0 to I-L1 Data 1 Register
LDR R1, =0x40000408;
MCR p15, 0, R1, c15, c5, 3; Write I-L1 Data 0 or 1 Register to BTB
To read one entry in instruction side BTB array, for example:
LDR R1, =0x40000408;
MCR p15, 0, R1, c15, c7, 3; Read BTB into I-L1 Data 0 or 1 Register
MRC p15, 0, R0, c15, c1, 0; Move I-L1 Data 0 Register to R0
MRC p15, 0, R2, c15, c1, 1; Move I-L1 Data 1 Register to R2
Thanks!
